module top_module(
    input [31:0] a,
    input [31:0] b,
    output [31:0] sum
);
    wire[15:0]w0;
    wire[15:0]w1;
    wire low_cout;
    wire cout;
    
    add16 low(a[15:0],b[15:0],0,sum[15:0],low_cout);
    add16 high0(a[31:16],b[31:16],0,w0,cout);
    add16 high1(a[31:16],b[31:16],1,w1,cout);
    
    assign sum[31:16]=low_cout?w1:w0; 
endmodule